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The October 2023 interim final rule revises ECCN 3A090.a to control ICs with a total processing performance of 4800 or more, or of 1600 or more with a performance density of 5.92 or more, and states that the performance density parameter is meant to prevent buying many smaller datacenter AI chips that combined would equal restricted chips. Copy claim link
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Supporting evidence: primary · 1 source
Provision Threshold or trigger · provision ID ch-bis-acr-2023-3a090-thresholds Subject version As published in the Federal Register (25 October 2023), 88 FR 73458 · Published 2023-10-25 · Effective 2023-11-17 Date 2023-10-25 · publication Scope and limits States the rule’s thresholds and stated purpose as described in its preamble; it does not show which products fall under them. The 3A090.b parameters and later revisions (December 2024, January 2025) are recorded separately or not at all.
The evidence 02 primary source Supports the claim
Implementation of Additional Export Controls: Certain Advanced Computing Items; Supercomputer and Semiconductor End Use; Updates and Corrections (88 FR 73458) ↗ Bureau of Industry and Security, in the Federal Register (govinfo.gov) · 2023-10-25
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Source excerpt “The revised 3A090.a control parameter will control ICs with one or more digital processing units having either: (1) a ‘total processing performance’ of 4800 or more, or (2) a ‘total processing performance’ of 1600 or more and a ‘performance density’ of 5.92 or more.” Location in source 88 FR 73474, preamble (PDF p. 17)
How it was read Retrieved directly from the publisher
Machine-checked · 2026-10-30
Source details and check notes Authors Bureau of Industry and Security, U.S. Department of Commerce Version Retrieved for the candidate pack on 2026-10-28 (SHA-256 7ae382cb1812b0b3052ad66a4f1bacbc6c93f45e0aab72912cac9807475309a1). Federal Register print of Wednesday, October 25, 2023, Vol. 88, No. 205, beginning at p. 73458, FR Doc. 2023-23055 (filed 10-18-23). Interim final rule. Retrieved again at admission on 2026-10-30 (SHA-256 7ae382cb1812b0b3052ad66a4f1bacbc6c93f45e0aab72912cac9807475309a1, the same bytes). Canonical address Open the canonical source ↗ Accessed 2026-10-28 Language English (en) Attribution Bureau of Industry and Security, U.S. Department of Commerce, “Implementation of Additional Export Controls: Certain Advanced Computing Items; Supercomputer and Semiconductor End Use; Updates and Corrections (88 FR 73458)”, 2023-10-25. Reuse No open redistribution licence asserted. Bibliographic metadata, editorial paraphrases and short attributed quotations (at most 50 words each). Recheck terms before wider redistribution. Check notes Candidate pack passage, compute, power and orbit (research/compute-power-orbit). The quotation (44 words) matched the text retrieved for the candidate pack on 2026-10-28 and again at admission on 2026-10-30, in a fresh retrieval whose SHA-256 equals the pack’s. Matching ignored differences of whitespace, case, quotation marks, dashes and Unicode compatibility forms, so the source’s typography can differ. No human editorial review. primary source Supports the claim
Implementation of Additional Export Controls: Certain Advanced Computing Items; Supercomputer and Semiconductor End Use; Updates and Corrections (88 FR 73458) ↗ Bureau of Industry and Security, in the Federal Register (govinfo.gov) · 2023-10-25
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Source excerpt “A performance density parameter prevents the workaround of simply purchasing a larger number of smaller datacenter AI chips which, if combined, would be equally powerful as restricted chips.” Location in source 88 FR 73474, preamble (PDF p. 17)
How it was read Retrieved directly from the publisher
Machine-checked · 2026-10-30
Source details and check notes Authors Bureau of Industry and Security, U.S. Department of Commerce Version Retrieved for the candidate pack on 2026-10-28 (SHA-256 7ae382cb1812b0b3052ad66a4f1bacbc6c93f45e0aab72912cac9807475309a1). Federal Register print of Wednesday, October 25, 2023, Vol. 88, No. 205, beginning at p. 73458, FR Doc. 2023-23055 (filed 10-18-23). Interim final rule. Retrieved again at admission on 2026-10-30 (SHA-256 7ae382cb1812b0b3052ad66a4f1bacbc6c93f45e0aab72912cac9807475309a1, the same bytes). Canonical address Open the canonical source ↗ Accessed 2026-10-28 Language English (en) Attribution Bureau of Industry and Security, U.S. Department of Commerce, “Implementation of Additional Export Controls: Certain Advanced Computing Items; Supercomputer and Semiconductor End Use; Updates and Corrections (88 FR 73458)”, 2023-10-25. Reuse No open redistribution licence asserted. Bibliographic metadata, editorial paraphrases and short attributed quotations (at most 50 words each). Recheck terms before wider redistribution. Check notes Candidate pack passage, compute, power and orbit (research/compute-power-orbit). The quotation (28 words) matched the text retrieved for the candidate pack on 2026-10-28 and again at admission on 2026-10-30, in a fresh retrieval whose SHA-256 equals the pack’s. Matching ignored differences of whitespace, case, quotation marks, dashes and Unicode compatibility forms, so the source’s typography can differ. No human editorial review. Status and meaning Editorial status. Not reviewed by an editor . An exploratory record that no editor has accepted. This status does not say whether a person has read any linked passage. Each evidence record above shows how it was checked.
Relation. An exact framework edition, or another document with an exact expression, states one provision: a capability threshold or risk level and its trigger, a required safeguard or action, a decision authority (who decides, recommends, can overrule or is informed), a stated exception, or another statement of its content, such as a licence term or a prospectus statement. The passage records what the document says, not implementation, compliance or effectiveness. Provisions with the same key align across editions of one family.
Date. Provision effective 17 November 2023.
Record ID cpo-ch-bis-acr-2023-3a090-thresholds